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Vacancies in IIT Bombay for Design Engineer (DE), Project Engineer (PE), Junior Research Fellow (JRF)

iitbPositions of Design Engineer (DE), Project Engineer (PE), Junior Research Fellow (JRF) are available in the following projects.

Chemistry

1. Junior Research Fellow (JRF)

  • Number of posts : 01 Post
  • Salary: Rs.12000/- p.m. + HRA (Consolidated)
  • Qualification : M.Sc. with First Class in Biotechnology /Biochemistry /Microbiology / Life Sciences or equivalent with valid GATE score or CSIR/ICMR JRF. At least 6 month experience in cell biology research with hands on training in biochemistry and molecular biology techniques are essential
  • Project Name : Development of Anti-Malarial Therapeutic based on Chemically Modified siRNA

Computer Science & Engineering

1. Design Engineer (DE)

  • Number of posts : 03 Posts
  • Salary: Rs.20000/- p.m. + HRA (Consolidated)
  • Qualification : B.E/B.Tech Degree. We are currently seeking PCB designers to design High speed FPGA based boards for advanced telecommunication applications. PCB design tools: The work will be primarily carried out in OrCAD / Allegro
  • Project Name : Multi-Service Transport Platform (MSTP) Development

2. Design Engineer (DE)

  • Number of posts : 02 Posts
  • Salary: Rs.20000/- p.m. + HRA (Consolidated)
  • Qualification : B.E/B.Tech Degree.We are currently seeking FPGA Design engineers for building technologies in advanced telecommunication applications
  • Project Name : Multi-Service Transport Platform (MSTP) Development

3. Design Engineer (DE)

  • Number of posts : 03 Posts
  • Salary: Rs.20000/- p.m. + HRA (Consolidated)
  • Qualification : B.E/B.Tech Degree and credited VHDL (preferred) or Verilog design, credited digital design coursework and relevant work experience. Areas of design, development, and test will involve one or more of the following areas: – Embedded Hardware Software design, – High-speed serial interfaces (upto 10 Gbps), and other industry standard interfaces (e.g. 10/100/1000 Ethernet, 10G Ethernet, SPI, UART, QDRII+ SRAM, DDR2, DDR3).
  • Project Name : PERISCOPE: Pragmatic Efficient Reliable Internetworking Solution Using Consumer-Centric Omnipresent Ethernet

4. Design Engineer (DE)

  • Number of posts : 02 Posts
  • Salary: Rs.20000/- p.m. + HRA (Consolidated)
  • Qualification : B.E/B.Tech Degree and credited VHDL (preferred) or Verilog design, credited digital design coursework and relevant work experience. Areas of design, development, and test will involve one or more of the following areas: – Embedded Hardware Software design, – High-speed serial interfaces (upto 10 Gbps), and other industry standard interfaces (e.g. 10/100/1000 Ethernet, 10G Ethernet, SPI, UART, QDRII+ SRAM, DDR2, DDR3).
  • Project Name : PERISCOPE: Pragmatic Efficient Reliable Internetworking Solution Using Consumer-Centric Omnipresent Ethernet

Electrical Engineering

1. Project Engineer (PE)

  • Number of posts : 01 Post
  • Salary: Rs.10000/- p.m. (Consolidated)
  • Qualification : B.Tech. in Electrical Engg. with one year work experience (or M.Tech.), preferably with knowledge of the design of power electronic systems (e.g. SMPS, drives, converters etc.)along with basic circuit analysis, MATLAB/SPICE simulation, PCB design and programming in C and/or Assembly for DSP/Micro-controllers.
  • Project Name : Development of Bidirectional Power Converter for Fuel Cell Systems

2. Junior Research Fellow ( JRF)

  • Number of posts : 01 Post
  • Salary: Rs.12000/- p.m. (Consolidated)
  • Qualification : B.Tech. in Electrical Engineering with one year experience (or M.Tech.), preferably with knowledge of the design of electronic/power electronic systems and their control (e.g. SMPS, drives etc.), PCB design, basic circuit analysis, computer simulations of circuits and systems, programming in C or assembly for microcontrollers/DSP
  • Project Name : Development of Switched Capacitor DC-DC Converters

Mathematics

1. Junior Research Fellow (JRF)

  • Number of posts : 01 Post
  • Salary: Rs.12000/- p.m. (Consolidated)
  • Qualification :M. Sc. in Mathematics
  • Project Name : Numerical Treatment of Integral Operators with Non-smooth Kernels

Last Date for receipt of application : 04.01.2010

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